| Presentation | 2006-03-10 A Fault Tolerant Look-Up Table Cascade Emulator Hiroki NAKAHARA, Tsutomu SASAO, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An LUT cascade emulator realizes an arbitrary sequential circuit. We convert the combinational part into multiple LUT cascades, and store LUT (cell) data into a memory in the LUT cascade emulator. It evaluates multi-output logic functions by reading cell data sequentially. To improve availability of the LUT cascade emulator, we add a self-checking circuit. Cell data stored in the memory are encoded into Berger codes. The self-checking circuit watches for whether memory outputs are Berger codes. The self-checking circuit can detect uni-directional errors of the memory for logic, a single stuck-at fault of a decoder, and a single stuck-at fault of the programmable connection circuit for rails. When a fault is detected, the monitor stops the LUT cascade emulator, and goes to the fault avoidance mode. First, it diagnoses the fault of the LUT cascade emulator. Next, it rewrites memory contents by memory-packing that avoids the failure parts of the memory for logic. Therefore, our method can improve the availability of the circuit. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | LUT cascade / Reconfigurable architecture / Self-adaptability architecture / Functional decomposition |
| Paper # | VLD2005-127,ICD2005-244 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2006/3/3(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Fault Tolerant Look-Up Table Cascade Emulator |
| Sub Title (in English) | |
| Keyword(1) | LUT cascade |
| Keyword(2) | Reconfigurable architecture |
| Keyword(3) | Self-adaptability architecture |
| Keyword(4) | Functional decomposition |
| 1st Author's Name | Hiroki NAKAHARA |
| 1st Author's Affiliation | Department of Comoputer Science and Electronics, Kyushu Institute of Technology() |
| 2nd Author's Name | Tsutomu SASAO |
| 2nd Author's Affiliation | Department of Comoputer Science and Electronics, Kyushu Institute of Technology |
| Date | 2006-03-10 |
| Paper # | VLD2005-127,ICD2005-244 |
| Volume (vol) | vol.105 |
| Number (no) | 647 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |