Presentation | 2006-03-09 A hardware/software partitioning system with design navigation for system LSIs design Yohei KOJIMA, Nozomu TOGAWA, Masayoshi TACHIBANA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper, we propose a new hardware/software partitioning system for system LSIs design. This system has the IP database and the design navigation. The IP database changes the number and kind of enumerated IP according to the constraints. By reusing the IPs in the database, we can decrease designing new module and the design period can be shortened. By reducing the number of enumerated IP, the search time can be shortened. The design navigation interactively can help the designer improves his/her design when the solution satisfy constraints is not obtained. By using the design navigation, the designer can examine the bottleneck and the architecture can be easily improved. We confirmed the effectiveness of the proposed system through computer experiments. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | HW/SW codesign / HW/SW partition / IP database / interactive system |
Paper # | VLD2005-111,ICD2005-228 |
Date of Issue |
Conference Information | |
Committee | ICD |
---|---|
Conference Date | 2006/3/2(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A hardware/software partitioning system with design navigation for system LSIs design |
Sub Title (in English) | |
Keyword(1) | HW/SW codesign |
Keyword(2) | HW/SW partition |
Keyword(3) | IP database |
Keyword(4) | interactive system |
1st Author's Name | Yohei KOJIMA |
1st Author's Affiliation | Dept. of Computer Science, Waseda University() |
2nd Author's Name | Nozomu TOGAWA |
2nd Author's Affiliation | Dept. of Computer Science, Waseda University |
3rd Author's Name | Masayoshi TACHIBANA |
3rd Author's Affiliation | Dept. of Electronic and Photonic System Engineering, Kouchi University of Technology |
4th Author's Name | Masao YANAGISAWA |
4th Author's Affiliation | Dept. of Computer Science, Waseda University |
5th Author's Name | Tatsuo OHTSUKI |
5th Author's Affiliation | Dept. of Computer Science, Waseda University |
Date | 2006-03-09 |
Paper # | VLD2005-111,ICD2005-228 |
Volume (vol) | vol.105 |
Number (no) | 646 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |