| Presentation | 2006/2/10 DFT of Instruction-Based Self-Test for Non-pipelined Processors Nobuhiro YAMAGATA, Masato NAKAZATO, Kazuko KAMBE, Tomokazu YONEDA, Satoshi OHTAKE, Michiko INOUE, Hideo FUJIWARA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a DFT method for instruction-based self-test using templates of non-pipelined processors. Instruction-based self-test using templates has a problem of error masking where some faults detected by a test generated for a module are not detected by the test program synthesized from the test. The proposed method achieves 100% template level fault efficiency in a sense that the proposed method completely resolves the problem of error masking. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | processors / instruction-based self-test / design for testability / template level fault efficiency |
| Paper # | DC2005-73 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2006/2/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | DFT of Instruction-Based Self-Test for Non-pipelined Processors |
| Sub Title (in English) | |
| Keyword(1) | processors |
| Keyword(2) | instruction-based self-test |
| Keyword(3) | design for testability |
| Keyword(4) | template level fault efficiency |
| 1st Author's Name | Nobuhiro YAMAGATA |
| 1st Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology() |
| 2nd Author's Name | Masato NAKAZATO |
| 2nd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 3rd Author's Name | Kazuko KAMBE |
| 3rd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 4th Author's Name | Tomokazu YONEDA |
| 4th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 5th Author's Name | Satoshi OHTAKE |
| 5th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 6th Author's Name | Michiko INOUE |
| 6th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| 7th Author's Name | Hideo FUJIWARA |
| 7th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
| Date | 2006/2/10 |
| Paper # | DC2005-73 |
| Volume (vol) | vol.105 |
| Number (no) | 607 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |