Presentation 2006-01-18
Implementation and Evaluation of Remote Logic Analyzer
Go SAITOU, Kazuo NAGATA, Hideo HARADA, Hidetomo SIBAMURA, Morihiro KUGA, Toshinori SUEYOSHI,
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Abstract(in English) Electronic equipments carrying a reconfigurable FPGA have advantages, the functions of which can be changed, upgraded after shipping. When we reconfigure the FPGA in a remote place, it takes the cost and time to dispatch of an engineer. Then, we developed an environment which reconfigures an FPGA and a remote logic analyzer which verifies reconfigured circuits with remote manipulation via Internet. In previous work, remote logic analyzer needed to equip a control PC as the remote server. However, the fact is that most remote servers are embedded systems. Thereby we developed a logic analyzer controller that controls logic analyzer IP on the embedded system. This paper reports details of the logic analyzer controller and the influence that logic analyzer IP exerts on the circuit to be tested.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Remote reconfiguration / ISP(In System Programming) / Logic analyzer
Paper # VLD2005-102,CPSY2005-58,RECONF2005-91
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Committee RECONF
Conference Date 2006/1/11(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation and Evaluation of Remote Logic Analyzer
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Remote reconfiguration
Keyword(3) ISP(In System Programming)
Keyword(4) Logic analyzer
1st Author's Name Go SAITOU
1st Author's Affiliation Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University()
2nd Author's Name Kazuo NAGATA
2nd Author's Affiliation Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University
3rd Author's Name Hideo HARADA
3rd Author's Affiliation Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University
4th Author's Name Hidetomo SIBAMURA
4th Author's Affiliation Department of Computer Science, Faculty of Engineering Kumamoto University
5th Author's Name Morihiro KUGA
5th Author's Affiliation Department of Computer Science, Faculty of Engineering Kumamoto University
6th Author's Name Toshinori SUEYOSHI
6th Author's Affiliation Department of Computer Science, Faculty of Engineering Kumamoto University
Date 2006-01-18
Paper # VLD2005-102,CPSY2005-58,RECONF2005-91
Volume (vol) vol.105
Number (no) 518
Page pp.pp.-
#Pages 6
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