| Presentation | 2006-01-18 Optimization of Body Bias Voltage Set for Threshold Voltage Control in Flex Power FPGA Takashi KAWANAMI, Masakazu HIOKI, Yohei MATSUMOTO, Toshiyuki TSUTSUMI, Tadashi NAKAGAWA, Toshihiro SEKIGAWA, Hanpei KOIKE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by controlling threshold voltage of transistors. This paper discusses the optimal threshold voltage set for threshold voltage control in the Flex Power FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / VPR / threshold voltage control / body bias voltage / low power-consumption |
| Paper # | VLD2005-97,CPSY2005-53,RECONF2005-86 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2006/1/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimization of Body Bias Voltage Set for Threshold Voltage Control in Flex Power FPGA |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | VPR |
| Keyword(3) | threshold voltage control |
| Keyword(4) | body bias voltage |
| Keyword(5) | low power-consumption |
| 1st Author's Name | Takashi KAWANAMI |
| 1st Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST() |
| 2nd Author's Name | Masakazu HIOKI |
| 2nd Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST |
| 3rd Author's Name | Yohei MATSUMOTO |
| 3rd Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST |
| 4th Author's Name | Toshiyuki TSUTSUMI |
| 4th Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST:Meiji University |
| 5th Author's Name | Tadashi NAKAGAWA |
| 5th Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST |
| 6th Author's Name | Toshihiro SEKIGAWA |
| 6th Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST |
| 7th Author's Name | Hanpei KOIKE |
| 7th Author's Affiliation | Electroinformatics Group, Nanoelectronics Research Institute, AIST |
| Date | 2006-01-18 |
| Paper # | VLD2005-97,CPSY2005-53,RECONF2005-86 |
| Volume (vol) | vol.105 |
| Number (no) | 518 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |