Presentation 2006-01-17
Implementation of Stream Application on Programmable Devices by C Level Design
Naohiro KATSURA, Yohei HASEGAWA, MANH TUAN Vu, Takamasa KANAMORI, Hideharu AMANO,
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Abstract(in English) While FPGA is a fine grain composition, the Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor; therefore, it would be useful to be able to find out the differences between these two devices in terms of the performance, the power consumption and the design technique through practical applications. This paper quantitatively evaluates these aspects by implementing several applications in C level designs.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Programmable Device / DRP / FPGA / C Level Design
Paper # VLD2005-93,CPSY2005-49,RECONF2005-82
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Committee RECONF
Conference Date 2006/1/10(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation of Stream Application on Programmable Devices by C Level Design
Sub Title (in English)
Keyword(1) Programmable Device
Keyword(2) DRP
Keyword(3) FPGA
Keyword(4) C Level Design
1st Author's Name Naohiro KATSURA
1st Author's Affiliation Graduate School of Science and Technology, Keio University()
2nd Author's Name Yohei HASEGAWA
2nd Author's Affiliation Graduate School of Science and Technology, Keio University
3rd Author's Name MANH TUAN Vu
3rd Author's Affiliation Graduate School of Science and Technology, Keio University
4th Author's Name Takamasa KANAMORI
4th Author's Affiliation Graduate School of Science and Technology, Keio University
5th Author's Name Hideharu AMANO
5th Author's Affiliation Graduate School of Science and Technology, Keio University
Date 2006-01-17
Paper # VLD2005-93,CPSY2005-49,RECONF2005-82
Volume (vol) vol.105
Number (no) 517
Page pp.pp.-
#Pages 6
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