| Presentation | 2006-01-19 Analysis of Slow Current Transients and Current Collapse in GaN FETs Hiroki TAKAYANAGI, Keiichi ITAGAKI, Hiroyuki NAKANO, Kazushige Horio, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Two-dimensional transient analyses of GaN MESFETs are performed in which a deep donor and a deep acceptor in a semi-insulating buffer layer are considered. Quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that the drain currents in the pulsed I-V curves become rather lower than those in the steady state, indicating that the current collapse could occur due to the slow response of deep traps in the buffer layer. The current collapse is shown to be more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because the trapping effects are more pronounced. The buffer trapping effects may be similar to trapping effects in an undoped GaN layer of AlGaN/GaN HEMTs. It is suggested that to minimize current collapse in GaN-based FETs, an acceptor density in a semi-insulating GaN layer should be made low. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GaN / FET / trap / current collapse / drain lag / two-dimensional transient analysis |
| Paper # | ED2005-199,MW2005-153 |
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| Conference Information | |
| Committee | MW |
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| Conference Date | 2006/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Microwaves (MW) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analysis of Slow Current Transients and Current Collapse in GaN FETs |
| Sub Title (in English) | |
| Keyword(1) | GaN |
| Keyword(2) | FET |
| Keyword(3) | trap |
| Keyword(4) | current collapse |
| Keyword(5) | drain lag |
| Keyword(6) | two-dimensional transient analysis |
| 1st Author's Name | Hiroki TAKAYANAGI |
| 1st Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology() |
| 2nd Author's Name | Keiichi ITAGAKI |
| 2nd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| 3rd Author's Name | Hiroyuki NAKANO |
| 3rd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| 4th Author's Name | Kazushige Horio |
| 4th Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| Date | 2006-01-19 |
| Paper # | ED2005-199,MW2005-153 |
| Volume (vol) | vol.105 |
| Number (no) | 524 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |