| Presentation | 2006-01-27 Current Trends in Quantum Complexity Theory Tetsuro NIHINO, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A logic circuit model of computation is a basis for all kinds of computations, and takes an important roll in quantum computation. Therefore, it is very important to study how to evaluate logic functions on quantum circuits and how to minimize or simplify the circuits. In this paper, we formalize the minimization problem of the depth of quantum logic circuits and show that this problem have some close relationship to a geometric approach to quantum circuit lower bounds. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | quantum computing / quantum circuit / circuit complexity theory / quantum circuit complexity / P=NP ? Problem |
| Paper # | SCE2005-27 |
| Date of Issue |
| Conference Information | |
| Committee | SCE |
|---|---|
| Conference Date | 2006/1/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Current Trends in Quantum Complexity Theory |
| Sub Title (in English) | |
| Keyword(1) | quantum computing |
| Keyword(2) | quantum circuit |
| Keyword(3) | circuit complexity theory |
| Keyword(4) | quantum circuit complexity |
| Keyword(5) | P=NP ? Problem |
| 1st Author's Name | Tetsuro NIHINO |
| 1st Author's Affiliation | Department of Information and Communication Engineering, The University of Electro-Communications() |
| Date | 2006-01-27 |
| Paper # | SCE2005-27 |
| Volume (vol) | vol.105 |
| Number (no) | 575 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |