| Presentation | 2002/6/24 Synchronous Mirror Delay for Multi-phase Locking Yong Jin Yoon, Jong Duk Lee, Byung Gook Park, Nam Seog Kim, Uk Rae Cho, Hyun Geun Byun, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A multi-phase synchronous circuit suited for DDR(double data rate) specification was designed using a SMD(synchronous mirror delay). The synchronizing error of the SMD was reduced under the delay time of unit delay stage by compensation characteristics of detecting circuit. By the compensating effect of the detecting circuit the synchronizing error of the SMD could be reduced to ±17ps for zero phase, which is smaller than the delay time of unit delay stage. For the multi-phase (90° in this paper) clock generation circuit including the SMD, the clock receiver, the clock driver and other additional circuits, the synchronizing error was less than ±40ps. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SMD / Multi-phase / DDR / clock |
| Paper # | ED2002-124 |
| Date of Issue |
| Conference Information | |
| Committee | ED |
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| Conference Date | 2002/6/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Synchronous Mirror Delay for Multi-phase Locking |
| Sub Title (in English) | |
| Keyword(1) | SMD |
| Keyword(2) | Multi-phase |
| Keyword(3) | DDR |
| Keyword(4) | clock |
| 1st Author's Name | Yong Jin Yoon |
| 1st Author's Affiliation | School of Electrical Engineering Seoul National University() |
| 2nd Author's Name | Jong Duk Lee |
| 2nd Author's Affiliation | School of Electrical Engineering Seoul National University |
| 3rd Author's Name | Byung Gook Park |
| 3rd Author's Affiliation | School of Electrical Engineering Seoul National University |
| 4th Author's Name | Nam Seog Kim |
| 4th Author's Affiliation | Samsung Electronics Corp. |
| 5th Author's Name | Uk Rae Cho |
| 5th Author's Affiliation | Samsung Electronics Corp. |
| 6th Author's Name | Hyun Geun Byun |
| 6th Author's Affiliation | Samsung Electronics Corp. |
| Date | 2002/6/24 |
| Paper # | ED2002-124 |
| Volume (vol) | vol.102 |
| Number (no) | 175 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |