| Presentation | 2002/4/4 A 44mm^2 4-Bank 8-word Page-Read 64Mb Flash Memory with Flexible Block Redundancy and Fast Accurate Word-line Voltage Controller Naoya TOKIWA, Toru TANZAWA, Akira UMEZAWA, Tadayuki TAURA, Hitoshi SHIGA, Yoshinori TAKANO, Hiroshi WATANABE, Kazunori MASUDA, Kiyomi NARUKE, Shigeru ATSUMI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We developed the world's smallest 44mm^2 NOR Flash memory by using negative-gate channel-erasing flash cell technology, 0.16 p m process rule and 4-Bank hierarchical word-line and bit-line architecture. This chip has flexible block redundancy scheme for channel erasing cell, fast accurate word-line voltage controller for a fast erase time of 0.5sec. and 8-word page read function resulting in 30ns effective read access. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Negative-gate channel-erase cell / flexible block redundancy / fast and accurate word-line voltage driver / 8-word page read access. |
| Paper # | ICD2002-5 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2002/4/4(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 44mm^2 4-Bank 8-word Page-Read 64Mb Flash Memory with Flexible Block Redundancy and Fast Accurate Word-line Voltage Controller |
| Sub Title (in English) | |
| Keyword(1) | Negative-gate channel-erase cell |
| Keyword(2) | flexible block redundancy |
| Keyword(3) | fast and accurate word-line voltage driver |
| Keyword(4) | 8-word page read access. |
| 1st Author's Name | Naoya TOKIWA |
| 1st Author's Affiliation | TOSHIBA Microelectronics Corp() |
| 2nd Author's Name | Toru TANZAWA |
| 2nd Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 3rd Author's Name | Akira UMEZAWA |
| 3rd Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 4th Author's Name | Tadayuki TAURA |
| 4th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 5th Author's Name | Hitoshi SHIGA |
| 5th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 6th Author's Name | Yoshinori TAKANO |
| 6th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 7th Author's Name | Hiroshi WATANABE |
| 7th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 8th Author's Name | Kazunori MASUDA |
| 8th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 9th Author's Name | Kiyomi NARUKE |
| 9th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| 10th Author's Name | Shigeru ATSUMI |
| 10th Author's Affiliation | TOSHIBA Corp., Semiconductor Company |
| Date | 2002/4/4 |
| Paper # | ICD2002-5 |
| Volume (vol) | vol.102 |
| Number (no) | 2 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |