Presentation	2005-12-02 Examinations of Small-World and Scale-Free characteristics in logic circuits Toshiaki MIYAZAKI,
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Abstract(in English)	Recently, it has been reported that many networks existing in both natural and artificial things have the Small-World (SF) and/or Scale-Free (SF) characteristics. In general, the SW/SF networks can propagate information quickly from one to another, and have some robustness for random accidents or attacks. In this paper, we describe the results examining benchmark circuits from the SW/SF point of view. Relatively large circuits have the SW/SF characteristics. In addition, we compare two circuits synthesized from the same RTL description : one is generated with optimization option while the other one is done without the optimization. The distributions of the number of fanouts in both circuits follow the power-low, and both of them have the SF characteristics.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	small-world / scale-free / logic optimization
Paper #	VLD2005-82,ICD2005-177,DC2005-59
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Conference Information
Committee	ICD
Conference Date	2005/11/25(1days)
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Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Examinations of Small-World and Scale-Free characteristics in logic circuits
Sub Title (in English)
Keyword(1)	small-world
Keyword(2)	scale-free
Keyword(3)	logic optimization
1st Author's Name	Toshiaki MIYAZAKI
1st Author's Affiliation	School of Computer Science and Engineering, The University of Aizu()
Date	2005-12-02
Paper #	VLD2005-82,ICD2005-177,DC2005-59
Volume (vol)	vol.105
Number (no)	446
Page	pp.pp.-
#Pages	4
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