Presentation | 2005/11/12 The parallel vision system employing the silicon retina and FPGA circuits Keisuke INOUE, Kazuhiro SHIMONOMURA, Tetsuya YAGI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We fabricated a novel vision system consisting of a neuromorphic silicon retina and FPGA circuits. The silicon retina executes two classes of fundamental image pre-processing : a Laplacian-Gaussian-like spatial filtering and a subtraction of consecutive image frames. The output images of the silicon retina are interfaced to FPGA circuits, with which image cues, e.g., contours of objects and thier directions of motion, are extracted in real time. The system has compact hardware and low power consumption (<1W) and therefore is suitable for controlling autonomous robots. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | silicon retina / parallel processing / early vision circuits / real-time |
Paper # | NC2005-68 |
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Committee | NC |
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Conference Date | 2005/11/12(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Neurocomputing (NC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | The parallel vision system employing the silicon retina and FPGA circuits |
Sub Title (in English) | |
Keyword(1) | silicon retina |
Keyword(2) | parallel processing |
Keyword(3) | early vision circuits |
Keyword(4) | real-time |
1st Author's Name | Keisuke INOUE |
1st Author's Affiliation | Graduate School of Engineering, Osaka University() |
2nd Author's Name | Kazuhiro SHIMONOMURA |
2nd Author's Affiliation | The Center of Advanced Medical Engineering and Informatics, Osaka University |
3rd Author's Name | Tetsuya YAGI |
3rd Author's Affiliation | Graduate School of Engineering, Osaka University |
Date | 2005/11/12 |
Paper # | NC2005-68 |
Volume (vol) | vol.105 |
Number (no) | 419 |
Page | pp.pp.- |
#Pages | 4 |
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