Presentation 2005-12-01
Permanent Fault Detection for FPGA by Reconfiguration
Yousuke NAKAMURA, Kei HIRAKI,
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Abstract(in English) When it is difficult to exchange a faulty hardware for a correct one, permanent faults are serious problem. To use hardwares in this circumstance, they must have efficient ways from being recovered from permanent faults. Reconfigurable devices are one of the powerful way to resolve it. To give a very strong fault-tolerance system to hardware, we have to consider fault-detection, it have a strong relation to fault-tolerant system. In previous works, to add a extra path and redundant allocation by software are proposed. We use another way. For path checking, we send pulse on it. When pulse is arrived at fault detector, it is verified that the path is alive. We make a auto-generating program for fault-detection circuit. The number of reconfiguration is the most problem which make longer the fault-detection term so we appreciate it. As a result, it is completed with four reconfiguration.
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Keyword(in English) FPGA / Permanent fault / Fault detection
Paper # RECONF2005-64
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Conference Information
Committee RECONF
Conference Date 2005/11/24(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Permanent Fault Detection for FPGA by Reconfiguration
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Permanent fault
Keyword(3) Fault detection
1st Author's Name Yousuke NAKAMURA
1st Author's Affiliation The University of Tokyo, Graduate School of Information Science and Technology()
2nd Author's Name Kei HIRAKI
2nd Author's Affiliation The University of Tokyo, Graduate School of Information Science and Technology
Date 2005-12-01
Paper # RECONF2005-64
Volume (vol) vol.105
Number (no) 451
Page pp.pp.-
#Pages 6
Date of Issue