| Presentation | 2005/11/17 Next Generation DSPs, estimated from experiences of past DSP development : Through DSP History Observation Takao Nishitani, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The difference between DSPs and general purpose microprocessors is first clarified through the review of DSP History. The development experiences on 4 different generation DSPs show us that the future picture processing DSP will employ multiple homogeneous DSPs in a chip. One possible approach will be the combination of the VSP architecture of SPMD and the IMAP architecture of SIMD, both of which we have developed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DSP / Architecture Aware Algorithm / Homogeneous multi-DSP / SPMD / VSP / SIMD / IMAP |
| Paper # | SIS2005-52 |
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| Conference Information | |
| Committee | SIS |
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| Conference Date | 2005/11/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Smart Info-Media Systems (SIS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Next Generation DSPs, estimated from experiences of past DSP development : Through DSP History Observation |
| Sub Title (in English) | |
| Keyword(1) | DSP |
| Keyword(2) | Architecture Aware Algorithm |
| Keyword(3) | Homogeneous multi-DSP |
| Keyword(4) | SPMD |
| Keyword(5) | VSP |
| Keyword(6) | SIMD |
| Keyword(7) | IMAP |
| 1st Author's Name | Takao Nishitani |
| 1st Author's Affiliation | Kochi University of Technology() |
| Date | 2005/11/17 |
| Paper # | SIS2005-52 |
| Volume (vol) | vol.105 |
| Number (no) | 426 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |