Presentation | 2005/10/6 AlGaN/GaN heterojunction field-effect transistors with InAlGaN quaternary alloy capping layers lattice matched to GaN Satoshi NAKAZAWA, Tetsuzo UEDA, Kaoru INOUE, Tsuyoshi TANAKA, Hiroyasu ISHIKAWA, Takashi EGAWA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper, we present recessed-gate AlGaN/GaN HFETs with lattice-matched InAlGaN capping layers, which reduce both ohmic contact resistance and series resistance between the AlGaN and the capping layer. The lattice-matched alloy epitaxial layer with both In and Al high compositions are successfully grown by metalorganic chemical vapor deposition (MOCVD). The grown lattice-matched In_<0.09>Al_<0.32>Ga_<0.59>N capping layer has close total polarization and bandgap to those of the underlying Al_<0.26>Ga_<0.74>N layer. The balanced polarization eliminates the depletion of electrons at the In_<0.09>Al_<0.32>Ga_<0.59>N/Al_<0.26>Ga_<0.74>N interface. which can reduce the series resistance across it. It is also noted that the fabricated HFET exhibits very low ohmic contact resistance of 1.0×10^<-6>Ωcm^2 or less. Detailed analysis of the source resistance reveals that the series resistance at the In_<0.09>Al_<0.32>Ga_<0.59>N/Al_<0.26>Ga_<0.74>N interface is one fifth as low as the resistance at the conventional GaN/Al_<0.26>Ga_<0.74>N interface. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | AlGaN/GaN HFET / quaternary alloy / source resistance / polarization / recessed-gate structure |
Paper # | ED2005-130,CPM2005-117,LQE005-57 |
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Committee | ED |
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Conference Date | 2005/10/6(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Electron Devices (ED) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | AlGaN/GaN heterojunction field-effect transistors with InAlGaN quaternary alloy capping layers lattice matched to GaN |
Sub Title (in English) | |
Keyword(1) | AlGaN/GaN HFET |
Keyword(2) | quaternary alloy |
Keyword(3) | source resistance |
Keyword(4) | polarization |
Keyword(5) | recessed-gate structure |
1st Author's Name | Satoshi NAKAZAWA |
1st Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co. Ltd.() |
2nd Author's Name | Tetsuzo UEDA |
2nd Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co. Ltd. |
3rd Author's Name | Kaoru INOUE |
3rd Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co. Ltd. |
4th Author's Name | Tsuyoshi TANAKA |
4th Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co. Ltd. |
5th Author's Name | Hiroyasu ISHIKAWA |
5th Author's Affiliation | Research Center for Nano-device and System, Nagoya Institute of Technology |
6th Author's Name | Takashi EGAWA |
6th Author's Affiliation | Research Center for Nano-device and System, Nagoya Institute of Technology |
Date | 2005/10/6 |
Paper # | ED2005-130,CPM2005-117,LQE005-57 |
Volume (vol) | vol.105 |
Number (no) | 325 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |