| Presentation | 2005-10-14 Quantitative evaluation of timing jitter for SFQ circuits Masayoshi TERABE, Akito SEKIYA, Akira FUJIMAKI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We measured the timing jitter of Josephson transmission lines with the time-to-digital converter (TDC) which can detect small time interval. We designed the TDCs based on the 2.5kA/cm^2 Nb NEC standard process and the 10kA/cm^2 process. The difference of the timing jitter between these two process technologies is an important factor to prospect the speed of the SFQ circuits. The measured timing jitters per Josephson junction on 2.5kA/cm^2 process and on 10kA/cm^2 process are 0.11ps and 0.08ps respectively. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SFQ circuit / Timing jitter / Time-to-digital converter |
| Paper # | SCE2005-22 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2005/10/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Quantitative evaluation of timing jitter for SFQ circuits |
| Sub Title (in English) | |
| Keyword(1) | SFQ circuit |
| Keyword(2) | Timing jitter |
| Keyword(3) | Time-to-digital converter |
| 1st Author's Name | Masayoshi TERABE |
| 1st Author's Affiliation | Department of Quantum Engineering, Nagoya University() |
| 2nd Author's Name | Akito SEKIYA |
| 2nd Author's Affiliation | CREST-JST |
| 3rd Author's Name | Akira FUJIMAKI |
| 3rd Author's Affiliation | Department of Quantum Engineering, Nagoya University:CREST-JST |
| Date | 2005-10-14 |
| Paper # | SCE2005-22 |
| Volume (vol) | vol.105 |
| Number (no) | 334 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |