Presentation 2005-10-21
Configurable Processor MeP and its SoC Design Examples
Takashi Miyamori,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) We developed an image recognition processor, "Visconti, " based on a configurable processor. Three VLIW processors that execute three instructions in parallel are integrated into a single chip with peripheral modules such as video I/Os and an SDRAM controller. Each VLIW processor has a RISC processor core and a VLIW coprocessor dedicated to image processing. The coprocessor executes SIMD instructions such as 8-parallel byte. Visconti was fabricated using 0.13μm CMOS technology, operates at 150MHz, and consumes about 1W. We present actual application examples of Visconti, onboard surveillance for automobiles and face recognition.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Configurable Processor / Image Recognition / Intelligent Vehicle / Multiprocessor / VLIW / SIMD
Paper # SIP2005-121,ICD2005-140,IE2005-85
Date of Issue

Conference Information
Committee IE
Conference Date 2005/10/14(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Image Engineering (IE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Configurable Processor MeP and its SoC Design Examples
Sub Title (in English)
Keyword(1) Configurable Processor
Keyword(2) Image Recognition
Keyword(3) Intelligent Vehicle
Keyword(4) Multiprocessor
Keyword(5) VLIW
Keyword(6) SIMD
1st Author's Name Takashi Miyamori
1st Author's Affiliation SoC Research & Development Center, Semiconductor Company, TOSHIBA Corporation()
Date 2005-10-21
Paper # SIP2005-121,ICD2005-140,IE2005-85
Volume (vol) vol.105
Number (no) 354
Page pp.pp.-
#Pages 6
Date of Issue