| Presentation | 2002/6/26 Importance of Channel Structure Engineering and Impact of Strained-SOI MOSFETs on Advanced CMOS technologies Shin-ichi TAKAGI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The influence of Si band bending due to inversion-layer capacitance prevents MOSFETs with ultra-thin gate oxides from operating at low supply voltage with keeping high current drive. Thus, the enhancement of inversion-layer mobility, which leads to high carrier velocity, becomes more important in scaled CMOS from both viewpoints of higher performance and lower power consumption. Strained-Si and/or SiGe-channel MOSFETs are promising device structures for this purpose. Recently, we have proposed more advanced device structures using strained-Si and strained-SiGe channels, strained-Si-on-Insulator and strained-SiGe-on-Insulator (strained-SOI and strained-SGOI) MOSFET. The device structure and the electrical characteristics of these MOSFETs are presented, with emphasis on the effects of strain on channel mobility. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS / mobility / inversion-layer capacitance / strain / SiGe / SOI / fully-depleted |
| Paper # | ED2002-182 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 2002/6/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Importance of Channel Structure Engineering and Impact of Strained-SOI MOSFETs on Advanced CMOS technologies |
| Sub Title (in English) | |
| Keyword(1) | CMOS |
| Keyword(2) | mobility |
| Keyword(3) | inversion-layer capacitance |
| Keyword(4) | strain |
| Keyword(5) | SiGe |
| Keyword(6) | SOI |
| Keyword(7) | fully-depleted |
| 1st Author's Name | Shin-ichi TAKAGI |
| 1st Author's Affiliation | MIRAI Project, ASET:Advanced LSI Technology Laboratory, Toshiba() |
| Date | 2002/6/26 |
| Paper # | ED2002-182 |
| Volume (vol) | vol.102 |
| Number (no) | 177 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |