| Presentation | 2002/7/11 Scheduling Algorithm with Void Space Reduction in Photonic Packet Switch Takashi Yamaguchi, Ken-ichi Baba, Masayuki Murata, Ken-ichi Kitayama, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we comparatively evaluate two photonic packet switch architectures with WDM-FDL buffers for synchronized variable length packets. The first one is an output buffer type switch, which stores packets in the FDL buffer attached to each output port. Another is a shared buffer type switch, which stores packets in the shared FDL buffer. The performance of a switch is greatly influenced by its architecture and the packet scheduling algorithm. We compare the performance of these two packet switches by applying different packet scheduling algorithms. Through simulation experiments, we show that each architecture has a parameter region for achieving a better performance. For the shared buffer type switch, we found that void space introduces unacceptable performance degradation when the traffic load is high. Accordingly, we propose a void space reduction method. Our simulation results show that our proposed method enables to the shared buffer type switch to outperform the output buffer type switch even under high traffic load conditions. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | WDM / Photonic Packet Switch / FDL Buffer / Variable Length Size Packet / Packet Scheduling Algorithm |
| Paper # | IN2002-35 |
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| Conference Information | |
| Committee | IN |
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| Conference Date | 2002/7/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Information Networks (IN) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Scheduling Algorithm with Void Space Reduction in Photonic Packet Switch |
| Sub Title (in English) | |
| Keyword(1) | WDM |
| Keyword(2) | Photonic Packet Switch |
| Keyword(3) | FDL Buffer |
| Keyword(4) | Variable Length Size Packet |
| Keyword(5) | Packet Scheduling Algorithm |
| 1st Author's Name | Takashi Yamaguchi |
| 1st Author's Affiliation | Graduate School of Engineering Science, Osaka University() |
| 2nd Author's Name | Ken-ichi Baba |
| 2nd Author's Affiliation | Cybermedia Center, Osaka University |
| 3rd Author's Name | Masayuki Murata |
| 3rd Author's Affiliation | Cybermedia Center, Osaka University |
| 4th Author's Name | Ken-ichi Kitayama |
| 4th Author's Affiliation | Graduate School of Engineering, Osaka University |
| Date | 2002/7/11 |
| Paper # | IN2002-35 |
| Volume (vol) | vol.102 |
| Number (no) | 213 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |