Presentation 2005-07-29
Design of Reconfigurable RF CMOS Wireless Circuit
Kenichi OKADA, Hirotaka SUGAWARA, Kazuya MASU,
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Abstract(in English) This paper proposes a dynamic reconfigurable architecture for analog RF circuits. The architecture consists of RF circuits and a control circuit. The RF circuits can be reconfigured by bias voltages of transistors and variable passive components, and the RF circuit block can also be switched dynamically. The proposed architecture can realize the multi-band/mode RF circuit in single chip for the Software Defined Radio, which achieves considerable reduction of circuit area and power consumption. On the other hand, we can obtain robust RF circuits by the dynamic reconfiguration for the process variation, the dynamic change of temperature, etc.
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Keyword(in English) Reconfigurable / RF CMOS / wireless / multi-standard / multi-mode
Paper # SR2005-35
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Committee SR
Conference Date 2005/7/21(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of Reconfigurable RF CMOS Wireless Circuit
Sub Title (in English)
Keyword(1) Reconfigurable
Keyword(2) RF CMOS
Keyword(3) wireless
Keyword(4) multi-standard
Keyword(5) multi-mode
1st Author's Name Kenichi OKADA
1st Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institutebof Technology()
2nd Author's Name Hirotaka SUGAWARA
2nd Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institutebof Technology
3rd Author's Name Kazuya MASU
3rd Author's Affiliation Precision and Intelligence Laboratory, Tokyo Institutebof Technology
Date 2005-07-29
Paper # SR2005-35
Volume (vol) vol.105
Number (no) 217
Page pp.pp.-
#Pages 7
Date of Issue