Presentation | 2005-09-16 Cluster architecture : Reconfigurable signal processing engine for wireless communications Miyoshi SAITO, Hisanori FUJISAWA, Nobuo UJIIE, Hideki YOSHIZAWA, |
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Abstract(in English) | We describe a dynamic reconfigurable baseband signal-processing engine suitable for mobile communications that require short operation latency. Signals are processed using a cluster group, which consists of clusters containing heterogeneous processor elements (PEs), inter-PE networks, and a sequencer that controls dynamic reconfiguration. The cluster group also has dedicated shared signal processing resources. In the cluster, combined data transfer and operations are carried out within one cycle to minimize operation latency, except for the multicycled PE. We evaluated the architecture by mapping several physical-layer IEEE802.11a and 11b wireless LAN algorithms. The results confirmed a shorter processing latency. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | recofigurable logic / wireless LAN / short latency |
Paper # | RECONF2005-47 |
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Committee | RECONF |
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Conference Date | 2005/9/9(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Cluster architecture : Reconfigurable signal processing engine for wireless communications |
Sub Title (in English) | |
Keyword(1) | recofigurable logic |
Keyword(2) | wireless LAN |
Keyword(3) | short latency |
1st Author's Name | Miyoshi SAITO |
1st Author's Affiliation | Fujitsu Limited() |
2nd Author's Name | Hisanori FUJISAWA |
2nd Author's Affiliation | Fujitsu Limited |
3rd Author's Name | Nobuo UJIIE |
3rd Author's Affiliation | Fujitsu LSI Technology Ltd. |
4th Author's Name | Hideki YOSHIZAWA |
4th Author's Affiliation | Fujitsu Limited |
Date | 2005-09-16 |
Paper # | RECONF2005-47 |
Volume (vol) | vol.105 |
Number (no) | 288 |
Page | pp.pp.- |
#Pages | 6 |
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