| Presentation | 2005-09-16 A Proposal of Design Support Tool for Genetic Algorithm Circuits on FPGA Tatsuhiro TACHIBANA, Yoshihiro MURATA, Naoki SHIBATA, KEIICHI Yasumoto, Minoru ITO, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Genetic Algorithm (GA) can be used for various applications including complex computations such as combinatory optimization problems. Such GA applications can be available to information appliances with poor resources by implementing them on dedicated hardware chips like FPGA. In this paper, we propose a method for efficiently design and implement GA applications on FPGA. Our method consists mainly of a parallel and pipelined architecture for various GA applications and a model to predict the size of the synthesized hardware circuits for various parameter values such as the size of the problem and the number of parallel pipelines. To facilitate hardware design, we have implemented two tools. The first tool uses a prediction model and calculates parameter values with which the hardware circuits can be synthesized on a specified FPGA device. The second tool generates the RT level VHDL description when the parameter values are given. In order to show efficiency of the proposed method, we have applied our method to Knapsack Problem and Traveling Salesman Problem. As a result, we have confirmed that the circuits synthesized with our tools achieve high performance and low power consumption, and that our prediction models predict the sizes of the synthesized circuits accurately enough for practical use. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | genetic algorithm / FPGA / hardware design automation / Knapsack Problem / Traveling Salesman Problem |
| Paper # | RECONF2005-42 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2005/9/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Proposal of Design Support Tool for Genetic Algorithm Circuits on FPGA |
| Sub Title (in English) | |
| Keyword(1) | genetic algorithm |
| Keyword(2) | FPGA |
| Keyword(3) | hardware design automation |
| Keyword(4) | Knapsack Problem |
| Keyword(5) | Traveling Salesman Problem |
| 1st Author's Name | Tatsuhiro TACHIBANA |
| 1st Author's Affiliation | Graduate School of Information Science Nara Institute of Science and Technology() |
| 2nd Author's Name | Yoshihiro MURATA |
| 2nd Author's Affiliation | Graduate School of Information Science Nara Institute of Science and Technology |
| 3rd Author's Name | Naoki SHIBATA |
| 3rd Author's Affiliation | Department of Information Processing and Managem ent, Shiga University |
| 4th Author's Name | KEIICHI Yasumoto |
| 4th Author's Affiliation | Graduate School of Information Science Nara Institute of Science and Technology |
| 5th Author's Name | Minoru ITO |
| 5th Author's Affiliation | Graduate School of Information Science Nara Institute of Science and Technology |
| Date | 2005-09-16 |
| Paper # | RECONF2005-42 |
| Volume (vol) | vol.105 |
| Number (no) | 288 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |