Presentation 2005-09-15
A Simulation Platform for Designing Self-Reconfigurable Architecture and its Application for Study on Coarse-Grained Devices
Shinichi KOUYAMA, Futoshi MORIE, Kentaro NAKAHARA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA,
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Abstract(in English) Recently, new reconfigurable devices with the concept of self-reconfiguration are proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grain devices, its flexibility is spoiled by overhead for reconfiguration time to load large amount of configuration data. Since many factors influence the performance of self-reconfigurable device such as reconfiguration time, the estimation of performance is difficult at the architecture design phase. In this paper, we propose the simulation-based platform for design exploration of self-reconfigurable devices. We also demonstrate the exploration of architecture using the proposed platform. In this experiment, we implement DCT as a sample application in devices of many kinds of granularity.
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Keyword(in English) self-reconfiguration / coarse-grained device / configuration data / evaluation of architecture
Paper # RECONF2005-36
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Committee RECONF
Conference Date 2005/9/8(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
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Title (in English) A Simulation Platform for Designing Self-Reconfigurable Architecture and its Application for Study on Coarse-Grained Devices
Sub Title (in English)
Keyword(1) self-reconfiguration
Keyword(2) coarse-grained device
Keyword(3) configuration data
Keyword(4) evaluation of architecture
1st Author's Name Shinichi KOUYAMA
1st Author's Affiliation Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.()
2nd Author's Name Futoshi MORIE
2nd Author's Affiliation Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.
3rd Author's Name Kentaro NAKAHARA
3rd Author's Affiliation Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.
4th Author's Name Tomonori IZUMI
4th Author's Affiliation Dept. of VLSI System Design, College of Science and Eng., Ritsumeikan Univ.
5th Author's Name Hiroyuki OCHI
5th Author's Affiliation Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.
6th Author's Name Yukihiro NAKAMURA
6th Author's Affiliation Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.
Date 2005-09-15
Paper # RECONF2005-36
Volume (vol) vol.105
Number (no) 287
Page pp.pp.-
#Pages 6
Date of Issue