| Presentation | 2005-09-15 Performance and Power Analysis of Time-multiplexed Execution on Dynamically Reconfigurable Processor Yohei HASEGAWA, Hideharu AMANO, Shohei ABE, Shunsuke KUROTAKI, Vu MANH TUAN, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixteen circuit configurations, or contexts at run-time. The time-multiplexed execution based on the multi-context functionality is expected to improves area and power efficiency. To demonstrate the impact of time-multiplexed execution, we have implemented several stream applications on DRP-1 with various context sizes. Throughout the evaluation based on real application desings, we analyzed the impact of the time-multiplexed execution to performance and power consumption quantitatively. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamically Reconfigurable Processor / DRP / Multicontext Functionality / Time-multiplexed Execution / Power Consumption |
| Paper # | RECONF2005-35 |
| Date of Issue |
| Conference Information | |
| Committee | RECONF |
|---|---|
| Conference Date | 2005/9/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance and Power Analysis of Time-multiplexed Execution on Dynamically Reconfigurable Processor |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable Processor |
| Keyword(2) | DRP |
| Keyword(3) | Multicontext Functionality |
| Keyword(4) | Time-multiplexed Execution |
| Keyword(5) | Power Consumption |
| 1st Author's Name | Yohei HASEGAWA |
| 1st Author's Affiliation | Department of Information and Computer Science, Keio University() |
| 2nd Author's Name | Hideharu AMANO |
| 2nd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 3rd Author's Name | Shohei ABE |
| 3rd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 4th Author's Name | Shunsuke KUROTAKI |
| 4th Author's Affiliation | Department of Information and Computer Science, Keio University |
| 5th Author's Name | Vu MANH TUAN |
| 5th Author's Affiliation | Department of Information and Computer Science, Keio University |
| Date | 2005-09-15 |
| Paper # | RECONF2005-35 |
| Volume (vol) | vol.105 |
| Number (no) | 287 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |