Presentation 2005-05-12
Analysis of Operating Speed and Power Consumption In Flex Power FPGA : From Circuit Level To Chip Level
Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Flex Power FPGA can flexibly control the operating speed and power consumption by the threshold voltage of transistor. This paper reports about the consistent analytical results from the detailed circuit level operation until the chip level operation mapped logic in the Flex Power FPGA.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Flex Power FPGA / Threshold voltage control / Flex Power VPR
Paper # RECONF2005-10
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Conference Information
Committee RECONF
Conference Date 2005/5/5(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analysis of Operating Speed and Power Consumption In Flex Power FPGA : From Circuit Level To Chip Level
Sub Title (in English)
Keyword(1) Flex Power FPGA
Keyword(2) Threshold voltage control
Keyword(3) Flex Power VPR
1st Author's Name Masakazu Hioki
1st Author's Affiliation Electroinformatics Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology()
2nd Author's Name Takashi Kawanami
2nd Author's Affiliation Electroinformatics Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
3rd Author's Name Toshiyuki Tsutsumi
3rd Author's Affiliation Department of Computer Science, School of Science and Technology, Meiji University
4th Author's Name Tadashi Nakagawa
4th Author's Affiliation Electroinformatics Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
5th Author's Name Toshihiro Sekigawa
5th Author's Affiliation Electroinformatics Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
6th Author's Name Hanpei Koike
6th Author's Affiliation Electroinformatics Group, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
Date 2005-05-12
Paper # RECONF2005-10
Volume (vol) vol.105
Number (no) 42
Page pp.pp.-
#Pages 6
Date of Issue