| Presentation | 2002/8/16 Endeavor in the Field of Random Sampling : Designing and Prototyping a Processor Suited for its Acceleration Masa-aki FUKASE, Takeshi Oyama, Zhe Liu, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Random numbers are used in two ways to directly evaluate their values and to indirectly use them in the random sampling of predetermined data. This paper describes designing and prototyping a valuable processor for random sampling acceleration that is affected by MIPS. While general processors require a number of instructions in random sampling that generate random numbers and assign them as operands of load instructions, the random sampling processor described in this paper is provided with a random sampling instruction by connecting a random number generator and a data cache. The random sampling processor reduces program size and thus running time, because a random sampling instruction covers one time random sampling. The random sampling processor reduces the running time by about 30% when it is used in deriving the number π by hit-or-miss Monte Carlo method. The random sampling processor is very useful for the quick and accurate random sampling of a large quantity of data such as cryptography. The FPGA chip implementing the random sampling processor operates at 40-MHz clock. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Random number generator / random sampling / processor / FPGA / Monte Carlo method / cryptography |
| Paper # | SDM2002-154 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2002/8/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Endeavor in the Field of Random Sampling : Designing and Prototyping a Processor Suited for its Acceleration |
| Sub Title (in English) | |
| Keyword(1) | Random number generator |
| Keyword(2) | random sampling |
| Keyword(3) | processor |
| Keyword(4) | FPGA |
| Keyword(5) | Monte Carlo method |
| Keyword(6) | cryptography |
| 1st Author's Name | Masa-aki FUKASE |
| 1st Author's Affiliation | Faculty of Science and Technology, Hirosaki University() |
| 2nd Author's Name | Takeshi Oyama |
| 2nd Author's Affiliation | Faculty of Science and Technology, Hirosaki University |
| 3rd Author's Name | Zhe Liu |
| 3rd Author's Affiliation | Graduate School of Engineering, Tohoku University |
| Date | 2002/8/16 |
| Paper # | SDM2002-154 |
| Volume (vol) | vol.102 |
| Number (no) | 272 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |