Presentation | 2005-12-16 Substrate-Coupled Inductor Model for Circuit Design Simulations : Implementation with Scalable Equations Ivan C. H. LAI, Minoru FUJISHIMA, |
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Abstract(in English) | Accurate modeling of the on-chip inductor is essential for the design of analog integrated circuits. The conventional model has a measurable discrepancy as the current flowing in the substrate is not correctly considered. The substrate-coupled inductor model, however, can correctly predict the equivalent resistance between terminals as well as the inductance and quality factor (Q-factor). In order to implement a fully scalable model, the circuit elements in the proposed model are expressed in terms of physical geometry. Measurements are made on inductors fabricated using a standard 0.35μm CMOS process and a 0.15μm silicon-on-insulator (SOI) CMOS process to successfully verify this model. |
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Paper # | ICD2005-199 |
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Committee | ICD |
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Conference Date | 2005/12/9(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Integrated Circuits and Devices (ICD) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Substrate-Coupled Inductor Model for Circuit Design Simulations : Implementation with Scalable Equations |
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1st Author's Name | Ivan C. H. LAI |
1st Author's Affiliation | School of Frontier Sciences, The University of Tokyo() |
2nd Author's Name | Minoru FUJISHIMA |
2nd Author's Affiliation | School of Frontier Sciences, The University of Tokyo:School of Engineering, The University of Tokyo |
Date | 2005-12-16 |
Paper # | ICD2005-199 |
Volume (vol) | vol.105 |
Number (no) | 476 |
Page | pp.pp.- |
#Pages | 6 |
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