| Presentation | 2005-12-16 A Conditional Clocking Flip-Flop for Low Power H.264/MPEG-4 Audio/Visual Codec LSI Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Chen Kong Teh, Takayoshi Shimazawa, Naoyuki Kawabe, Takeshi Kitahara, Yu Kikuchi, Tsuyoshi Nishikawa, Masafumi Takahashi, Yukihito Oowaki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A novel conditional clocking flip-flop is proposed. The flip-flop circuit does not consume any power when the data input of the flip-flop does not change its state. Taking the overhead of the auxiliary circuits into account, the flip-flop consumes less power than the conventional flip-flop when the data transition probability is less than 55%. By employing the conditional clocking flip-flop circuits in a mobile applications LSI, the power consumption is reduced by 8-31%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | clock gating / flip-flop / low power |
| Paper # | ICD2005-196 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2005/12/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Conditional Clocking Flip-Flop for Low Power H.264/MPEG-4 Audio/Visual Codec LSI |
| Sub Title (in English) | |
| Keyword(1) | clock gating |
| Keyword(2) | flip-flop |
| Keyword(3) | low power |
| 1st Author's Name | Mototsugu Hamada |
| 1st Author's Affiliation | SoC Research & Development Center, Toshiba Corp.() |
| 2nd Author's Name | Hiroyuki Hara |
| 2nd Author's Affiliation | SoC Research & Development Center, Toshiba Corp. |
| 3rd Author's Name | Tetsuya Fujita |
| 3rd Author's Affiliation | SoC Research & Development Center, Toshiba Corp. |
| 4th Author's Name | Chen Kong Teh |
| 4th Author's Affiliation | SoC Research & Development Center, Toshiba Corp. |
| 5th Author's Name | Takayoshi Shimazawa |
| 5th Author's Affiliation | SoC Research & Development Center, Toshiba Corp. |
| 6th Author's Name | Naoyuki Kawabe |
| 6th Author's Affiliation | System LSI Division I, Toshiba Corp. |
| 7th Author's Name | Takeshi Kitahara |
| 7th Author's Affiliation | System LSI Division I, Toshiba Corp. |
| 8th Author's Name | Yu Kikuchi |
| 8th Author's Affiliation | System LSI Division I, Toshiba Corp. |
| 9th Author's Name | Tsuyoshi Nishikawa |
| 9th Author's Affiliation | System LSI Division I, Toshiba Corp. |
| 10th Author's Name | Masafumi Takahashi |
| 10th Author's Affiliation | System LSI Division I, Toshiba Corp. |
| 11th Author's Name | Yukihito Oowaki |
| 11th Author's Affiliation | SoC Research & Development Center, Toshiba Corp. |
| Date | 2005-12-16 |
| Paper # | ICD2005-196 |
| Volume (vol) | vol.105 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |