Presentation | 2005/11/25 CHA-MEN : A VLIW Processor Simulation Environment with Instruction Scheduling Framework Atsushi TSUKIKAWA, Fumihito FURUKAWA, Takayuki AOKI, Daisuke OKA, Kanemitsu OOTSU, Takashi YOKOTA, Takanobu BABA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | To efficiently utilize the increasing amount of hardware resources sustained by the advance of semiconductor technology, we have proposed a new-generation dynamic optimizing computer system built on an on-chip multiprocessor. Detailed quantitative simulation systems for such next-generation systems are required; therefore we are developing a simulation system for on-chip multi VLIW processors. CHA-MEN is an initial implementation of the system. Since instruction scheduling is an important factor of VLIW system, CHA-MEN provides integrated design of the simulator and language processor; that enables rapid evaluation of scheduling algorithm. CHA-MEN Scheduler Framework makes the swift implementation of scheduling algorithms easier. In this paper, we describe the design and implementation of CHA-MEN and demonstrate its practical benefits for scheduling experiment. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | VLIW / simulation / architecture simulator / instruction scheduling |
Paper # | CPSY2005-27 |
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Committee | CPSY |
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Conference Date | 2005/11/25(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Computer Systems (CPSY) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | CHA-MEN : A VLIW Processor Simulation Environment with Instruction Scheduling Framework |
Sub Title (in English) | |
Keyword(1) | VLIW |
Keyword(2) | simulation |
Keyword(3) | architecture simulator |
Keyword(4) | instruction scheduling |
1st Author's Name | Atsushi TSUKIKAWA |
1st Author's Affiliation | Faculty of Engineering, Utsunomiya University() |
2nd Author's Name | Fumihito FURUKAWA |
2nd Author's Affiliation | Learning Technology Laboratory, Teikyo University |
3rd Author's Name | Takayuki AOKI |
3rd Author's Affiliation | Faculty of Engineering, Utsunomiya University |
4th Author's Name | Daisuke OKA |
4th Author's Affiliation | Faculty of Engineering, Utsunomiya University |
5th Author's Name | Kanemitsu OOTSU |
5th Author's Affiliation | Faculty of Engineering, Utsunomiya University |
6th Author's Name | Takashi YOKOTA |
6th Author's Affiliation | Faculty of Engineering, Utsunomiya University |
7th Author's Name | Takanobu BABA |
7th Author's Affiliation | Faculty of Engineering, Utsunomiya University |
Date | 2005/11/25 |
Paper # | CPSY2005-27 |
Volume (vol) | vol.105 |
Number (no) | 453 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |