| Presentation | 2000/2/18 Analysis of Time-Sequential Failure Logic Using Monte Carlo Simulation Wei LONG, Yoshinobu SATO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Computer-based Monte Carlo simulation is often applied to engineering estimations of the statistics describing various functions utilizing statistical descriptions of the involved variables. As is well known, the causation of a system failure can be reasoned by developing a fault tree(FT). In practices, there are cases where the output of the minimal cut-AND structure depends not only on all failed states of inputs but also on the sequence of occurrences of those failures. This paper recommends applying the Monte Carlo simulation to analyze the time-sequential failure logic found in FT. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Time-sequential failure logic / FTA / Monte Carlo simulation |
| Paper # | R99-36, EMD99-86 |
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| Conference Information | |
| Committee | EMD |
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| Conference Date | 2000/2/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electromechanical Devices (EMD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analysis of Time-Sequential Failure Logic Using Monte Carlo Simulation |
| Sub Title (in English) | |
| Keyword(1) | Time-sequential failure logic |
| Keyword(2) | FTA |
| Keyword(3) | Monte Carlo simulation |
| 1st Author's Name | Wei LONG |
| 1st Author's Affiliation | Tokyo University of Mercantile Marine() |
| 2nd Author's Name | Yoshinobu SATO |
| 2nd Author's Affiliation | Tokyo University of Mercantile Marine |
| Date | 2000/2/18 |
| Paper # | R99-36, EMD99-86 |
| Volume (vol) | vol.99 |
| Number (no) | 644 |
| Page | pp.pp.- |
| #Pages | 6 |
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