Presentation 1999/11/8
Small Complexity Arithmetic Circuits Using the Polynomial Ring Representation
Nobuyuki DAIMON, Tatsuya KUROKAWA, Masami MOHRI, Masakatu MORII,
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Abstract(in English) In this paper, we propose the parallel-in-parallel-out multipliers for the field F_2m using the polynomial ring representation. Our method is able to construct the high-performance multipliers in the sense that their circuit scale and critical delay path (CDP) are small. Furthermore, we derive the performance evaluation for our multiplier, and we give some experiments based on it. As the result, we show that our multiplier is more effective than the others for many values of m.
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Keyword(in English) finite field / parallel multiplier / normal basis / canonical basis / polynomial ring
Paper # ISEC99-63
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Committee ISEC
Conference Date 1999/11/8(1days)
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Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Small Complexity Arithmetic Circuits Using the Polynomial Ring Representation
Sub Title (in English)
Keyword(1) finite field
Keyword(2) parallel multiplier
Keyword(3) normal basis
Keyword(4) canonical basis
Keyword(5) polynomial ring
1st Author's Name Nobuyuki DAIMON
1st Author's Affiliation Department of Information Science and Intelligent Systems, Faculty of Engineering, The University of Tokushima()
2nd Author's Name Tatsuya KUROKAWA
2nd Author's Affiliation Department of Information Science and Intelligent Systems, Faculty of Engineering, The University of Tokushima
3rd Author's Name Masami MOHRI
3rd Author's Affiliation Department of Information Science and Intelligent Systems, Faculty of Engineering, The University of Tokushima
4th Author's Name Masakatu MORII
4th Author's Affiliation Department of Information Science and Intelligent Systems, Faculty of Engineering, The University of Tokushima
Date 1999/11/8
Paper # ISEC99-63
Volume (vol) vol.99
Number (no) 414
Page pp.pp.-
#Pages 8
Date of Issue