| Presentation | 1999/10/21 A Prototype Chip of the Intelligent Image Sensor for Edge Detection Shuntaro Hiroya, Takeyasu Sakai, Toshihisa Watabe, Takashi Matsumoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The intelligent sensor is known as an architecture which can perform fast parallel image processing. An unit operation circuitry for intelligent sensors must take small areas and lower power dissipation, then we have considered of the differential amplifier with floating gate transistors. In this report, We explain about the differential amplifier, its application, and a prototype chip of the intelligent image sensor for edge detection which is now under fabrication. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | intelligent sensor / APS / FPN / edge detection / vision chip / floating gate |
| Paper # | EID99-53 |
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| Conference Information | |
| Committee | EID |
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| Conference Date | 1999/10/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Electronic Information Displays (EID) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Prototype Chip of the Intelligent Image Sensor for Edge Detection |
| Sub Title (in English) | |
| Keyword(1) | intelligent sensor |
| Keyword(2) | APS |
| Keyword(3) | FPN |
| Keyword(4) | edge detection |
| Keyword(5) | vision chip |
| Keyword(6) | floating gate |
| 1st Author's Name | Shuntaro Hiroya |
| 1st Author's Affiliation | Department of Electrical, Electronics and Computer Engineering, Waseda University() |
| 2nd Author's Name | Takeyasu Sakai |
| 2nd Author's Affiliation | Electronic Navigation Research Institute, Ministry of Transport |
| 3rd Author's Name | Toshihisa Watabe |
| 3rd Author's Affiliation | Science & Technical Research Laboratories, NHK |
| 4th Author's Name | Takashi Matsumoto |
| 4th Author's Affiliation | Department of Electrical, Electronics and Computer Engineering, Waseda University |
| Date | 1999/10/21 |
| Paper # | EID99-53 |
| Volume (vol) | vol.99 |
| Number (no) | 374 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |