Presentation 1999/11/26
Evaluation of an On-Chip Multiprocessor Architecture SKY
Yukihiro Ogawa, Ryotaro Kobayashi, Hideki Ando, Toshio Shimada,
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Abstract(in English) We have proposed a processor architecture, called SKY, which efficiently executes multiple threads in parallel for non-numeric programs with multiple processors. This paper shows comprehensive performance evaluation results and analysis of SKY. Our evaluation results show that SKY architecture achieves good performance improvements over a single superscalar processor, but a large difference of speedups is found among benchmark programs. We analyze what causes the difference by investigating instructions issued from the instruction window. We then found that the speedup significantly changes depending on existence of threads that can be executed in parallel and interference of multithreading execution with exploiting instruction-level parallelism.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) multiprocessor / multithread / thread-level parallelism
Paper # VLD99-72
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Committee VLD
Conference Date 1999/11/26(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Evaluation of an On-Chip Multiprocessor Architecture SKY
Sub Title (in English)
Keyword(1) multiprocessor
Keyword(2) multithread
Keyword(3) thread-level parallelism
1st Author's Name Yukihiro Ogawa
1st Author's Affiliation Graduate School of Engineering, Nagoya University()
2nd Author's Name Ryotaro Kobayashi
2nd Author's Affiliation Graduate School of Engineering, Nagoya University
3rd Author's Name Hideki Ando
3rd Author's Affiliation Graduate School of Engineering, Nagoya University
4th Author's Name Toshio Shimada
4th Author's Affiliation Graduate School of Engineering, Nagoya University
Date 1999/11/26
Paper # VLD99-72
Volume (vol) vol.99
Number (no) 474
Page pp.pp.-
#Pages 8
Date of Issue