Presentation | 1999/10/21 Fabrication of HBT with buried tungsten mesh used as a collector electrode T. Arai, Y. Harada, H. Tobita, Y. Miyamoto, K. Furuya, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper reports the fabrication process of buried metal heterojunction bipolar transistor, in which buried metal works as a schottky collector electrode and can reduce the total base-collector capacitance. In buried growth using OMVPF, 1μm wide tungsten stripes were buried by a 1.1μm thick InP layer under 600℃ as a growth temperature, 460 as a V/III ratio and 28 nm/min as a growth rate. In the nano-fabrication of tungsten, 140 nm pitch tungsten electrodes were fabricated by novel metal-stencil liftoff. To show the transistor operation of the device with the same epitaxial layers of BM-HBT, we fabricated an InP-based HBT with buried tungsten mesh replacing the subcollector layer. 12 as a current gain was measured from the common-emitter collector I-V characteristics. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | BM-HBT / GaInAs/InP HBT / Buried growth / OMVPE / Metal-stencil liftoff / Tungsten |
Paper # | CPM99-107 |
Date of Issue |
Conference Information | |
Committee | CPM |
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Conference Date | 1999/10/21(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Component Parts and Materials (CPM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Fabrication of HBT with buried tungsten mesh used as a collector electrode |
Sub Title (in English) | |
Keyword(1) | BM-HBT |
Keyword(2) | GaInAs/InP HBT |
Keyword(3) | Buried growth |
Keyword(4) | OMVPE |
Keyword(5) | Metal-stencil liftoff |
Keyword(6) | Tungsten |
1st Author's Name | T. Arai |
1st Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology() |
2nd Author's Name | Y. Harada |
2nd Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
3rd Author's Name | H. Tobita |
3rd Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
4th Author's Name | Y. Miyamoto |
4th Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
5th Author's Name | K. Furuya |
5th Author's Affiliation | Department of Electrical and Electronic Engineering, Tokyo Institute of Technology |
Date | 1999/10/21 |
Paper # | CPM99-107 |
Volume (vol) | vol.99 |
Number (no) | 378 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |