Presentation | 1999/10/29 Phase-mode INHIBIT gate with large operation region of circuit papameters and bias margin Takeshi ONOMI, Kiyoshi YANAGISAWA, Koji NAKAJIMA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose the phase-mode basic gate which have a large bias margin and a large oeration region of circuit parameters. Performance of the proposed gates are evaluated by numerical simulations. The phase-mode basic gate consists of INHIBIT gate and AND gate. These two gates have large bias margins because of the simple circuit operations. Monte-Carlo calculation results show that each yield of the INHIBIT gate and the AND gate does not decrease up to σ=8% and σ=11%. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | superconductive device / Josephson junction / Josephson transmission line / flux quantum / logic circuit |
Paper # | SCE99-29 |
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Committee | SCE |
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Conference Date | 1999/10/29(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Superconductive Electronics (SCE) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Phase-mode INHIBIT gate with large operation region of circuit papameters and bias margin |
Sub Title (in English) | |
Keyword(1) | superconductive device |
Keyword(2) | Josephson junction |
Keyword(3) | Josephson transmission line |
Keyword(4) | flux quantum |
Keyword(5) | logic circuit |
1st Author's Name | Takeshi ONOMI |
1st Author's Affiliation | Research Institute of Electrical Communication, Tohoku University() |
2nd Author's Name | Kiyoshi YANAGISAWA |
2nd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
3rd Author's Name | Koji NAKAJIMA |
3rd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
Date | 1999/10/29 |
Paper # | SCE99-29 |
Volume (vol) | vol.99 |
Number (no) | 408 |
Page | pp.pp.- |
#Pages | 6 |
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