Presentation 1999/11/27
A Design Method for a Circuit with Neuron MOS Transistors Realizing Any Symmetric Function
Kazuo Aoyama, Hiroshi Sawada, Akira Nagoya, Kazuo Nakajima,
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Abstract(in English) A design method for a circuit with neuron MOS transistors (νMOS circuit), especially a 2-level feed-forward circuit, that is capable of realizing any symmetric function is presented in this paper. We think designing νMOS circuits means to give proper values to input gate capacitances and a floating gate threshold voltage. A feature of this method is that the above two variables are related by a formula. This method certifies that solutions for variables can be obtained for any k-input variable symmetric function circuit and gives unique solution when a standard input gate capacitance and a floating gate threshold voltage are fixed. These characteristcs are effective to realize any symmetric function νMOS circuit without difficulty.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) neuron MOS transistor / reconfiguable device / symmetric function / circuit design
Paper # CPSY99-90
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Committee CPSY
Conference Date 1999/11/27(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Design Method for a Circuit with Neuron MOS Transistors Realizing Any Symmetric Function
Sub Title (in English)
Keyword(1) neuron MOS transistor
Keyword(2) reconfiguable device
Keyword(3) symmetric function
Keyword(4) circuit design
1st Author's Name Kazuo Aoyama
1st Author's Affiliation NTT Communication Science Laboratories()
2nd Author's Name Hiroshi Sawada
2nd Author's Affiliation NTT Communication Science Laboratories
3rd Author's Name Akira Nagoya
3rd Author's Affiliation NTT Communication Science Laboratories
4th Author's Name Kazuo Nakajima
4th Author's Affiliation University of Maryland
Date 1999/11/27
Paper # CPSY99-90
Volume (vol) vol.99
Number (no) 481
Page pp.pp.-
#Pages 8
Date of Issue