| Presentation | 2000/1/12 The KIT COSMOS Processor : Background and Rationale Toshinori SATO, Itsujiro ARITA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a microprocessor architecture which efficiently utilizes next-generation semiconductor technology. While the technology makes it possible to integrate a lot of functional units on a single chip, contemporary microprocessors can not exploit much instruction level parallelism so that the units are wasted. Our proposal based on Simultaneous Multi-Threading(SMT)increases the number of available instructions and thus the functional units work efficiently. As well as application programs, a binary code translator which dynamically optimize the applications on-the-fly is executed on the SMT. We call this mechanism CON current Dynamic OptimizeR(CONDOR). Based on the CONDOR, performance of the applications are improved as well. We are currently studying the KIT COSMOS processor which utilizes the CONDOR. This paper describes background and some ideas behind the architecture. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | instruction level parallelism / dynamic optimization / simultaneous multithreading |
| Paper # | VLD99-106,CPSY99-115 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2000/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | The KIT COSMOS Processor : Background and Rationale |
| Sub Title (in English) | |
| Keyword(1) | instruction level parallelism |
| Keyword(2) | dynamic optimization |
| Keyword(3) | simultaneous multithreading |
| 1st Author's Name | Toshinori SATO |
| 1st Author's Affiliation | KYUSHU INSTITUTE OF TECHNOLOGY() |
| 2nd Author's Name | Itsujiro ARITA |
| 2nd Author's Affiliation | KYUSHU INSTITUTE OF TECHNOLOGY |
| Date | 2000/1/12 |
| Paper # | VLD99-106,CPSY99-115 |
| Volume (vol) | vol.99 |
| Number (no) | 532 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |