| Presentation | 2000/1/12 Gate Level Simulation of JK Flip-flops without Reset Terminals Hiroaki MATSUSHITA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Most of the textbooks to use in learning digital systems are explaining the operation principle of JK flip-flops by the gate level schematics which don't contain reset terminals. In gate level simulation of JK flip-flops without reset terminals, when all initial values of the inner gates of flip-flops are set to 0 or 1, flip-flops can cause oscillations. When they are set to undefined value x, flip-flops don't work as they output undefined values. To avoid such a situation, as for much of traditional logic circuit CAD's, they are equipped with the function that initial values at inner gates can be manually set. In this paper, we propose a new algorithm which sets initial values at inner gates of JK flip-flops whitout reset terminals automatically. JK flip-flops without reset terminals became able to be simulated in gate level without doing manual setting by this algorithm. We also incorporated this algorithm into a Educational CAD system and ascertained the effectivity. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | logic circuit / simulation / JK flip-flops / reset terminal / initial values setting |
| Paper # | VLD99-99,CPSY99-108 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2000/1/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Gate Level Simulation of JK Flip-flops without Reset Terminals |
| Sub Title (in English) | |
| Keyword(1) | logic circuit |
| Keyword(2) | simulation |
| Keyword(3) | JK flip-flops |
| Keyword(4) | reset terminal |
| Keyword(5) | initial values setting |
| 1st Author's Name | Hiroaki MATSUSHITA |
| 1st Author's Affiliation | Takuma National College of Technology() |
| Date | 2000/1/12 |
| Paper # | VLD99-99,CPSY99-108 |
| Volume (vol) | vol.99 |
| Number (no) | 532 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |