| Presentation | 2000/2/9 Voltage gain of Si single-electron transistor and analysis of performance of nMOS-type inverter with resistive load Liu K-T, A. Fujiwara, Y. Takahashi, K. Murase, Y. Horikoshi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Voltage gain is one of the most fundamental parameters of single-electron transistors(SETs)for their application to circuits.In general, due to the device structure of the SET, it is difficult to achieve high voltage gain which is dominated by the ratio of the gate capacitance to the drain capacitance.In this paper, in order to attain a guiding principle for the improvement of voltage gain, we fabricate SETs by pattern-dependent oxidation(PADOX)method and systematically investigate the relation between the voltage gain and the structural parameters of Si-SETs such as Si wire length and gate oxide thickness.Moreover, we simulate the operation of the nMOS-type inverter with resistive load, based on measured IV data of Si-SETs.We analyze voltage gain, response time, power consumption and logic swing voltage;we discuss their correlation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SET / voltage gain / PADOX / response time / power consumption / logic swing voltage |
| Paper # | ED99-297,SDM99-190 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 2000/2/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Voltage gain of Si single-electron transistor and analysis of performance of nMOS-type inverter with resistive load |
| Sub Title (in English) | |
| Keyword(1) | SET |
| Keyword(2) | voltage gain |
| Keyword(3) | PADOX |
| Keyword(4) | response time |
| Keyword(5) | power consumption |
| Keyword(6) | logic swing voltage |
| 1st Author's Name | Liu K-T |
| 1st Author's Affiliation | Electrial Engineering, Graduate School of Science and Engineering, Waseda University() |
| 2nd Author's Name | A. Fujiwara |
| 2nd Author's Affiliation | NTT Basic Research Labs. |
| 3rd Author's Name | Y. Takahashi |
| 3rd Author's Affiliation | NTT Basic Research Labs. |
| 4th Author's Name | K. Murase |
| 4th Author's Affiliation | NTT Basic Research Labs. |
| 5th Author's Name | Y. Horikoshi |
| 5th Author's Affiliation | Electrial Engineering, Graduate School of Science and Engineering, Waseda University |
| Date | 2000/2/9 |
| Paper # | ED99-297,SDM99-190 |
| Volume (vol) | vol.99 |
| Number (no) | 615 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |