| Presentation | 2002/7/5 High Performance Implementation of Decoding Variable Length Codes on Media Processor Masao ISHIGURO, Yoshifumi FUJIKAWA, Muneaki YAMAGUCHI, Kazushige HIROI, Norihiro SUZUKI, Atsuo KAWAGUCHI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | SIMD-type instructions and/or VLIW architecture are well-known features of high-performance processors. Although these features are effective for data-parallel algorithms, they have (almost) no effect for sequential algorithms such as decoding variable length codes. In order to address this issue, the media processor MAPCA has a co-processor for processing variable length code in addition to its 136-bit VLIW processor. Our prototype MPEG-4 decoder runs about 3.1 times faster than that using only the VLIW processor on MAPCA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Media Processor / MPEG-4 / Video / Decoder / VLIW / Variable length code |
| Paper # | CQ2002-68 |
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| Conference Information | |
| Committee | CQ |
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| Conference Date | 2002/7/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Communication Quality (CQ) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High Performance Implementation of Decoding Variable Length Codes on Media Processor |
| Sub Title (in English) | |
| Keyword(1) | Media Processor |
| Keyword(2) | MPEG-4 |
| Keyword(3) | Video |
| Keyword(4) | Decoder |
| Keyword(5) | VLIW |
| Keyword(6) | Variable length code |
| 1st Author's Name | Masao ISHIGURO |
| 1st Author's Affiliation | Hitachi, Ltd. Systems Development Laboratory() |
| 2nd Author's Name | Yoshifumi FUJIKAWA |
| 2nd Author's Affiliation | Hitachi, Ltd. Systems Development Laboratory |
| 3rd Author's Name | Muneaki YAMAGUCHI |
| 3rd Author's Affiliation | Central Research Laboratory |
| 4th Author's Name | Kazushige HIROI |
| 4th Author's Affiliation | Hitachi, Ltd. Systems Development Laboratory |
| 5th Author's Name | Norihiro SUZUKI |
| 5th Author's Affiliation | Central Research Laboratory |
| 6th Author's Name | Atsuo KAWAGUCHI |
| 6th Author's Affiliation | Hitachi, Ltd. Systems Development Laboratory |
| Date | 2002/7/5 |
| Paper # | CQ2002-68 |
| Volume (vol) | vol.102 |
| Number (no) | 191 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |