| Presentation | 2002/3/12 Temporal-Domain Neural Competition in Analog Integrate-and-Fire Neurochips Hideki HAYASHI, Takashi YAMADA, Tetsuya ASAI, Yoshihito AMEMIYA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, we present an inhibitory neural network implemented on analog CMOS chips, whose neurons compete with each other in the frequency and time domains. The circuit for each neuron was designed to produce sequences in time of identically shaped pulses, called spikes. The results of experiments and simulations revealed that the network more efficiently achieved the selective activation and inactivation of the neural circuits on the basis of spike timing than on the basis of firing rates. The results indicate that neural processing based on the spike timing of neural circuits provides a possible way to overcome the low-tolerance problems of analog devices in noisy environments. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Analog VLSI / Competitive neural network / Spike-timing code / Integrate-and-fire neurons |
| Paper # | NC2001-172 |
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| Conference Information | |
| Committee | NC |
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| Conference Date | 2002/3/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Neurocomputing (NC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Temporal-Domain Neural Competition in Analog Integrate-and-Fire Neurochips |
| Sub Title (in English) | |
| Keyword(1) | Analog VLSI |
| Keyword(2) | Competitive neural network |
| Keyword(3) | Spike-timing code |
| Keyword(4) | Integrate-and-fire neurons |
| 1st Author's Name | Hideki HAYASHI |
| 1st Author's Affiliation | Department of Electrical Engineering, Hokkaido University() |
| 2nd Author's Name | Takashi YAMADA |
| 2nd Author's Affiliation | Department of Electrical Engineering, Hokkaido University |
| 3rd Author's Name | Tetsuya ASAI |
| 3rd Author's Affiliation | Department of Electrical Engineering, Hokkaido University |
| 4th Author's Name | Yoshihito AMEMIYA |
| 4th Author's Affiliation | Department of Electrical Engineering, Hokkaido University |
| Date | 2002/3/12 |
| Paper # | NC2001-172 |
| Volume (vol) | vol.101 |
| Number (no) | 736 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |