Presentation | 2005-09-08 Basic Study of Proper Circuit Line Structure for Advanced System in Package Syouhei YASUDA, Yoshiharu IWATA, Ryohei SATOH, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Although the semiconductor has raised performance by speeding up of the clock frequency and shrinking the process rule, a signal integrity becomes poor quality at the global wire without receiving the benefit of a scaling law, and it becomes the neck of the improvement of semiconductor performance in near future. Then, we propose that the signal integrity has been improved by making structure of global wire into strip-line + coplanar structure. And the 10mm global wiring that is equivalent to one side of an average chip about a clock frequency (10GHz digital signal) is assumed supposing next-generation SiP. And we decided to attain signal attenuation smaller than -10dB at 30GHz which is the 3rd harmonics as signal integrity. And the wiring structure of fulfilling the specification is investigated by using the electromagnetic analysis. Furthermore, from the result, the approximate expression of wiring size and the relation of signal attenuation was created. By using this approximate expression, it computed that between lines was realizable in the size set to 2.4μm the copper interconnect of 1.2μm angle as wiring which fulfills the above-mentioned specification. Moreover, the good result could be obtained as a result of verifying these results by a electromagnetic simulation. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Global circuit line / System in a package / System on a chip / Signal integrity / Circuit line structure / Transmission line |
Paper # | CPM2005-91,ICD2005-101 |
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Committee | CPM |
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Conference Date | 2005/9/1(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Component Parts and Materials (CPM) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Basic Study of Proper Circuit Line Structure for Advanced System in Package |
Sub Title (in English) | |
Keyword(1) | Global circuit line |
Keyword(2) | System in a package |
Keyword(3) | System on a chip |
Keyword(4) | Signal integrity |
Keyword(5) | Circuit line structure |
Keyword(6) | Transmission line |
1st Author's Name | Syouhei YASUDA |
1st Author's Affiliation | Graduate School of Engineering, Osaka University:(Present address)Melco Display Technology Incorporated() |
2nd Author's Name | Yoshiharu IWATA |
2nd Author's Affiliation | Center for Advanced Science and Innovation, Osaka University |
3rd Author's Name | Ryohei SATOH |
3rd Author's Affiliation | Center for Advanced Science and Innovation, Osaka University |
Date | 2005-09-08 |
Paper # | CPM2005-91,ICD2005-101 |
Volume (vol) | vol.105 |
Number (no) | 265 |
Page | pp.pp.- |
#Pages | 6 |
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