Presentation 2005/7/29
Tile Fault-Tolerant Approach
Hiroyuki KAWAI, Yoshiki YAMAGUCHI, Noriyuki AIBE, Moritoshi YASUNAGA,
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Abstract(in English) In the space, galactic cosmic rays and solar rays collide with integrated circuits, and then it causes "soft" or "hard" failure that increase in proportion to exposing to radiation, in the device. Due to the increasing requirement of spacecraft application, it is important that radiation fault-tolerant techniques are improved. This paper describes an approach, tile fault-tolerant, which realizes higher fault-tolerant using reconfiguring modules which the system are composed of. The approach determines the approximate size of "tile" which a module is composed of, so that efficiency and effectiveness with the system is improved. The experimental result shows that our proposed approach can produce a prototype hardware system that is smaller when compared with a simple fault-tolerant implementation such as triple module redundancy. It is clear as that tile fault-tolerant approach can implement larger circuits than current ones using the same device.
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Keyword(in English) fault-tolerant / single event effenct / FPGA / reconfigurable architechture
Paper # DC2005-16
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Committee DC
Conference Date 2005/7/29(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Tile Fault-Tolerant Approach
Sub Title (in English)
Keyword(1) fault-tolerant
Keyword(2) single event effenct
Keyword(3) FPGA
Keyword(4) reconfigurable architechture
1st Author's Name Hiroyuki KAWAI
1st Author's Affiliation Dept. of Computer Science, Graduate School of Systems and Information Engineering, Univ.()
2nd Author's Name Yoshiki YAMAGUCHI
2nd Author's Affiliation Dept. of Computer Science, Graduate School of Systems and Information Engineering, Univ.
3rd Author's Name Noriyuki AIBE
3rd Author's Affiliation Dept. of Computer Science, Graduate School of Systems and Information Engineering, Univ.
4th Author's Name Moritoshi YASUNAGA
4th Author's Affiliation Dept. of Computer Science, Graduate School of Systems and Information Engineering, Univ.
Date 2005/7/29
Paper # DC2005-16
Volume (vol) vol.105
Number (no) 227
Page pp.pp.-
#Pages 6
Date of Issue