Presentation 2002/3/7
Realizing Network Emulator System with Intel IXP1200 Network Processor
Haruki Tojo, Go Hasegawa, Masayuki Murata,
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Abstract(in English) In this paper, we show the design and implementation issues of a network emulator system with Intel IXP1200 network processor. We first describe required functions for the network emulator system. Those include buffering algorithms, link delay/loss emulation mechanisms and so on, and we discuss implementation issues for those functions. We have implemented some of the functions on the software simulator of IXP1200, and confirmed that the implemented functions work correctly. We further evaluate the estimated performance of the implemented functions to discuss the processing overhead compared with the simple packet forwarding algorithm.
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Keyword(in English) Network Processor / Intel IXP1200 / Netowrk Emulator / Experimental Network / Microengine
Paper # NS2001-227
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Committee NS
Conference Date 2002/3/7(1days)
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Registration To Network Systems(NS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Realizing Network Emulator System with Intel IXP1200 Network Processor
Sub Title (in English)
Keyword(1) Network Processor
Keyword(2) Intel IXP1200
Keyword(3) Netowrk Emulator
Keyword(4) Experimental Network
Keyword(5) Microengine
1st Author's Name Haruki Tojo
1st Author's Affiliation Faculty of Engineering Science, Osaka University()
2nd Author's Name Go Hasegawa
2nd Author's Affiliation Cybermedia Center, Osaka University
3rd Author's Name Masayuki Murata
3rd Author's Affiliation Cybermedia Center, Osaka University
Date 2002/3/7
Paper # NS2001-227
Volume (vol) vol.101
Number (no) 714
Page pp.pp.-
#Pages 8
Date of Issue