| Presentation | 2005/3/10 VLSI Architecture of Motion Compensation Module for Multi-Standard Video Decoder Watkanad VERAPORN, Motoki KIMURA, Gen FUJITA, Takao ONOYE, Isao SHIRAKAWA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Multi-standard video decoders can be implemented by software using general-purpose processors, however when considering power consumption, dedicated architecture for video decoding processes is more desirable. This paper proposes VLSI architecture of motion compensation module for H.264, MPEG-4, and H.263 video standards, which has major computation complexity in video decoding process. The proposed architecture is implemented with different parameters so to evaluate power-performance tradeoff. As a result, real-time decoding of CIF 30fps video can be achieved at operating frequency of 48MHz, and power consumption of 23.3mW. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | H.264 / Multi-Standard Video Decoder / Motion Compensation / VLSI Architecture |
| Paper # | SIS2004-62 |
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| Conference Information | |
| Committee | SIS |
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| Conference Date | 2005/3/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Smart Info-Media Systems (SIS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | VLSI Architecture of Motion Compensation Module for Multi-Standard Video Decoder |
| Sub Title (in English) | |
| Keyword(1) | H.264 |
| Keyword(2) | Multi-Standard Video Decoder |
| Keyword(3) | Motion Compensation |
| Keyword(4) | VLSI Architecture |
| 1st Author's Name | Watkanad VERAPORN |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Osaka University() |
| 2nd Author's Name | Motoki KIMURA |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 3rd Author's Name | Gen FUJITA |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 4th Author's Name | Takao ONOYE |
| 4th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 5th Author's Name | Isao SHIRAKAWA |
| 5th Author's Affiliation | Graduate School of Applied Informatics, University of Hyogo |
| Date | 2005/3/10 |
| Paper # | SIS2004-62 |
| Volume (vol) | vol.104 |
| Number (no) | 735 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |