| Presentation | 2004-10-21 An Optically Differential Reconfigurable Gate Array using a 0.18 μm CMOS process Minoru WATANABE, Fuminori KOBAYASHI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents the design of a high-density optically differential reconfigurable gate array (ODRGA) using a O.l8μm - 5Metal CMOS process technology. ODRGA is a type of Field Programmable Gate Arrays (FPGAs). However, unlike conventional FPGAs, ODRGAs are reconfigured optically using an external optical system. Although ODRGAs have already been fabricated using a 0.35μm - 3Metal CMOS process technology, their gate-density remains unsatisfactory. For that reason, a new ODRGA-VLSI chip with four logic blocks, five switching matrices, and 16 I/O bits was fabricated on a 7.82mm^2 chip using more advanced process technology. This paper presents the detailed design of a fabricated ODRGA-VLSI chip, the optical reconfiguration circuit, the gate array structure, the CAD layout, and an ODRGA-VLSI chip mounted on an estimation board. This study also includes experimental results regarding the reconfiguration period. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGAs / ORGAs / Optical Reconfiguration / Dynamically Reconfigurable Devices |
| Paper # | SIP2004-86,ICD2004-118,IE2004-62 |
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| Conference Information | |
| Committee | SIP |
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| Conference Date | 2004/10/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Signal Processing (SIP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Optically Differential Reconfigurable Gate Array using a 0.18 μm CMOS process |
| Sub Title (in English) | |
| Keyword(1) | FPGAs |
| Keyword(2) | ORGAs |
| Keyword(3) | Optical Reconfiguration |
| Keyword(4) | Dynamically Reconfigurable Devices |
| 1st Author's Name | Minoru WATANABE |
| 1st Author's Affiliation | Faculty of Computer Science and Systems Engineering, Kyushu Institute of Technology() |
| 2nd Author's Name | Fuminori KOBAYASHI |
| 2nd Author's Affiliation | Faculty of Computer Science and Systems Engineering, Kyushu Institute of Technology |
| Date | 2004-10-21 |
| Paper # | SIP2004-86,ICD2004-118,IE2004-62 |
| Volume (vol) | vol.104 |
| Number (no) | 363 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |