Presentation 2004/7/16
Impact of Chip Duty and Pulse Shape on Bit Error Probabilities for Ultra Wideband DS-CDMA
Mohammad Azizur RAHMAN, Shigenobu SASAKI, Jie ZHOU, Hisakazu KIKUCHI,
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Abstract(in English) In this paper, we derive the bit error probabilities (BEP) for ultra wideband (UWB) direct sequence code division multiple access (DS-CDMA) communications using random sequences with arbitrary chip duty and pulse shape. In other words, we investigate the impact of chip duty and pulse shape on error probabilities for UWB DS-CDMA. Both synchronous and asynchronous users and carrier-less and carrier-based communications are considered. Additive white Gaussian noise (AWGN) is neglected. The decision statistics are developed. Then BEP equations are presented under Gaussian and simplified improved Gaussian approximations of the multiple access interference (MAI). Results obtained show that for certain chip length, pulse shape and BEP, the number of simultaneous users can be increased considerably in asynchronous system, if the chip duty is lowered. Again, the use of pulse shape having better autocorrelation property also helps to facilitate larger number of simultaneous users. A carrier-based system is found to perform better than a similar carrier-less system. Finally, simulation results are presented to validate theoretical derivations.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Ultra wideband / DS-UWB / CDMA / error probability / chip duty factor
Paper # SIP2004-45,WBS2004-26
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Committee SIP
Conference Date 2004/7/16(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Impact of Chip Duty and Pulse Shape on Bit Error Probabilities for Ultra Wideband DS-CDMA
Sub Title (in English)
Keyword(1) Ultra wideband
Keyword(2) DS-UWB
Keyword(3) CDMA
Keyword(4) error probability
Keyword(5) chip duty factor
1st Author's Name Mohammad Azizur RAHMAN
1st Author's Affiliation Department of Electrical and Electronic Engineering, Niigata University()
2nd Author's Name Shigenobu SASAKI
2nd Author's Affiliation Department of Electrical and Electronic Engineering, Niigata University
3rd Author's Name Jie ZHOU
3rd Author's Affiliation Department of Electrical and Electronic Engineering, Niigata University
4th Author's Name Hisakazu KIKUCHI
4th Author's Affiliation Department of Electrical and Electronic Engineering, Niigata University
Date 2004/7/16
Paper # SIP2004-45,WBS2004-26
Volume (vol) vol.104
Number (no) 215
Page pp.pp.-
#Pages 6
Date of Issue