| Presentation | 2005-05-23 Prioritized and Fair Buffer Management in Optical Packet Switches Hiroaki HARAI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Previously, we proposed high-throughput buffer management mechanism based on a parallel and pipeline processing architecture. In this paper, we add further high-performance functions to the buffer management. We describe an extended method for a two-class priority control with sustaining throughput. Then we describe an extended method for a fainess among input ports. Finally, we show the effectiveness of the both extended methods through simulation experiments. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | optical packet switch / buffer management / parallel and pipeline processing / priority control / fairness |
| Paper # | PN2005-9 |
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| Conference Information | |
| Committee | PN |
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| Conference Date | 2005/5/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Photonic Network (PN) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Prioritized and Fair Buffer Management in Optical Packet Switches |
| Sub Title (in English) | |
| Keyword(1) | optical packet switch |
| Keyword(2) | buffer management |
| Keyword(3) | parallel and pipeline processing |
| Keyword(4) | priority control |
| Keyword(5) | fairness |
| 1st Author's Name | Hiroaki HARAI |
| 1st Author's Affiliation | National Institute of Information and Communications Technology() |
| Date | 2005-05-23 |
| Paper # | PN2005-9 |
| Volume (vol) | vol.105 |
| Number (no) | 77 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |