Presentation 2005-04-22
Development of A Hardware SNTP Server
Hiroshi Toriyama, Akihiko Machizawa, Tsukasa Iwama, Akihiro Kaneko,
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Abstract(in English) We have developed a high-precision and high-throughput hardware SNTP server using a FPGA(Field Programmable Gate Array). This hardware is designed only for a stratum 1 SNTP server which simply puts timestamps based on an accurate external clock. Our SNTP server works as fast as the wire-speed of Gigabit Ethernet, and has timestamp accuracy of 8 nano-seconds even in full-traffic. Because of this performance, the server requires no overload protections nor crack protections.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) NTP / Time Synchronization / Time-Stamp / FPGA
Paper # CQ2005-12
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Conference Information
Committee CQ
Conference Date 2005/4/15(1days)
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Paper Information
Registration To Communication Quality (CQ)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of A Hardware SNTP Server
Sub Title (in English)
Keyword(1) NTP
Keyword(2) Time Synchronization
Keyword(3) Time-Stamp
Keyword(4) FPGA
1st Author's Name Hiroshi Toriyama
1st Author's Affiliation National Institute of Information and Communications Technology()
2nd Author's Name Akihiko Machizawa
2nd Author's Affiliation National Institute of Information and Communications Technology
3rd Author's Name Tsukasa Iwama
3rd Author's Affiliation National Institute of Information and Communications Technology
4th Author's Name Akihiro Kaneko
4th Author's Affiliation National Institute of Information and Communications Technology
Date 2005-04-22
Paper # CQ2005-12
Volume (vol) vol.105
Number (no) 17
Page pp.pp.-
#Pages 4
Date of Issue