| Presentation | 2005/5/19 Hardware Neural Network for Real Time Learning : Hardware Neuro-system for Real Time Sensory External Check Seungwoo CHUN, Yosihiro HAYAKAWA, Koji NAKAJIMA, Kouki HAGIWARA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | At factories, the external check of final products relies on the human check, which is based on experience and instinct. Such method is difficult to do long time and to reduce production cost. Therefore we expect an automatic external check system. We use the hardware neural network at the judgment enabling high-speed judgment and the automatic acquisition of the judgment criteria. In order to speed up operations, we have implemented parallel and pipeline processing into hardware. We design the circuit so that the derivative of the activation function is always a constant. The object time is within 0.1 second per one product. Measurements showing that the hardware neural network system can complete the process within 23ms are also presented. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Back-propagation / Sensory external check / PCI-BUS / Hardware |
| Paper # | NC2005-6 |
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| Committee | NC |
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| Conference Date | 2005/5/19(1days) |
| Place (in Japanese) | (See Japanese page) |
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| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Neurocomputing (NC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Neural Network for Real Time Learning : Hardware Neuro-system for Real Time Sensory External Check |
| Sub Title (in English) | |
| Keyword(1) | Back-propagation |
| Keyword(2) | Sensory external check |
| Keyword(3) | PCI-BUS |
| Keyword(4) | Hardware |
| 1st Author's Name | Seungwoo CHUN |
| 1st Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics Research Institute of Electrical Communication, Tohoku University() |
| 2nd Author's Name | Yosihiro HAYAKAWA |
| 2nd Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics Research Institute of Electrical Communication, Tohoku University |
| 3rd Author's Name | Koji NAKAJIMA |
| 3rd Author's Affiliation | Laboratory for Brainware/Laboratory for Nanoelectronics and Spintronics Research Institute of Electrical Communication, Tohoku University |
| 4th Author's Name | Kouki HAGIWARA |
| 4th Author's Affiliation | NEC Tohoku Manufacturing Systems. Co. Ltd. |
| Date | 2005/5/19 |
| Paper # | NC2005-6 |
| Volume (vol) | vol.105 |
| Number (no) | 82 |
| Page | pp.pp.- |
| #Pages | 6 |
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